Electronic System Level

Models and their Application

IP Meta Models FOR SOC Assembly and HW/SW interfaces

 






















 

 

 

 

 

 

 

 

 

Chapter 2 IP Meta Models FOR SOC Assembly and HW/SW interfaces

A functional model contains a lot of information, but it does not often contain the information about how it was meant to be used, what restrictions are placed on its usage or the way in which it is meant to be connected. This information is considered to be metadata about that block and was often the principle information that would have been found on a specification sheet for a device. Once that information is captured in a formalized manner it can be used by tools to help with things such as system construction, enable system consistency to be analyzed or to reduce the burden of things such as documentation.


2.1 Introduction
2.2 IP databases
2.3 SPIRIT/IP-XACT
     2.3.1 History of SPIRIT
     2.3.2 RTL assembly level
     2.3.3 System modeling level
2.4 Register definition languages
     2.4.1 Motivation: Modeling the HW/SW interface
     2.4.2 HW/SW Design Flow for HW/SW interfaces
     2.4.3 Emerging HW/SW Interface Tools and design flows
2.5 Conclusions
2.6 References

Errata

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