Electronic System Level

Design and Verification

Author - Grant Martin

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Grant Martin is a Chief Scientist at Tensilica, Inc. in Santa Clara, California. Before that, Grant worked for Burroughs in Scotland for 6 years; Nortel/BNR in Canada for 10 years; and Cadence Design Systems for 9 years, eventually becoming a Cadence Fellow in their Labs. He received his Bachelor’s and Master’s degrees in Mathematics (Combinatorics and Optimisation) from the University of Waterloo, Canada, in 1977 and 1978.

Grant is a co-author of Surviving the SOC Revolution: A Guide to Platform-Based Design, and System Design with SystemC, and a co-editor of the books Winning the SoC Revolution: Experiences in Real Design, and UML for Real: Design of Embedded Real-Time Systems. In 2004, he co-wrote with Vladimir Nemudrov the first book on SoC design published in Russian by Technosphera, Moscow. Recently he co-edited Taxonomies for the Development and Verification of Digital Systems (Springer, 2005), UML for SoC Design (Springer, 2005), and the two-volume Electronic Design Automation for Integrated Circuits Handbook (Taylor and Francis/CRC Press, 2006). He has also written or co-written chapters in several other books. He has also presented many papers, talks, and tutorials, and participated in panels, at a number of major conferences.

He co-chaired the VSIA Embedded Systems study group in the summer of 2001, and was co-chair of the Design Automation Conference (DAC) Technical Programme Committee for Methods for 2005 and 2006. His particular areas of interest include system-level design, IP-based design of SoC, platform-based design, and embedded software. Grant is a Senior Member of the IEEE.


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