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Electronic System LevelDesign and VerificationContributors |
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This book was also made possible by the contributions of the following experts: Mark Burton received his B. Eng. from the University of Warwick, and his Ph.D. in AI and Education from Leeds University. He was an engineering manager at ARM, and also chair of OSCI’s transaction-level modeling (TLM) working group. Recently he founded GreenSoCs, as both a consultancy and an open-source community centered on SystemC, and is also the chair of OCP-IP’s system-level design working group. Jack Greenbaum is the Director of Embedded Software Development in the Advanced Products Group at Green Hills Software, where he is involved in the development of complex embedded system and RTOS infrastructure. His career has spanned both EDA and software development tools at leading semiconductor and embedded software companies. His research interests include ESL tools and environments, performance analysis for embedded systems, and reconfigurable computing. Jack earned a BS in Computer Science and MS in Electrical and Computer Engineering at the University of California, Santa Barbara. Kamal Hashmi is a co-founder and VP of Research and Development at SpiraTech, Ltd., in Manchester, U.K. Kamal is an expert in ESL design tools and languages, and interface-based design methodologies. He has been a major contributor to the VSI System Level Design working group and written a number of papers on system-level design. He has previously worked in data management, simulation, and test before moving to system design languages and methodologies at ICL/Fujitsu. Kamal is a Chartered Mathematician and holds an Honours degree in Mathematics from Leeds University. Anssi Haverinen works with Texas Instruments as a system architect in 3G wireless technology in San Diego, California. Previously, he worked with Nokia from 1992 to 2006 in several roles, the latest as a system design manager for US-CDMA cell phone platforms. He has actively driven the development of ESL methodology and open standards, especially in transaction-level modeling, in his companies and in the standards forums of OCP-IP, OSCI, and VSIA. Anssi holds an M.Sc.(EE) from Tampere University of Technology, Finland, in microelectronics. Luciano Lavagno received his Ph.D. in EECS from U.C. Berkeley in 1992 and from Politecnico di Torino in 1993. He is a co-author of two books on asynchronous circuit design, a book on hardware/software co-design of embedded systems, and of over 160 scientific papers, and serves on the technical committees of several international conferences in his field. Between 1993 and 2000 he was the architect of the POLIS project, which developed a complete hardware/software co-design environment for control-dominated embedded systems. He is currently an Associate Professor with Politecnico di Torino, Italy and a research scientist with Cadence Berkeley Laboratories. His research interests include the synthesis of asynchronous and low-power circuits, the concurrent design of mixed hardware and software embedded systems, and compilation tools and architectural design of dynamically reconfigurable processors. Mike Meredith is the Vice President of Technical Marketing for Forte Design Systems. He also serves as the president of the Open SystemC Initiative (OSCI). He has over 10 years’ embedded systems experience in the biomedical and industrial automation industries. He began working in the EDA industry more than 15 years ago, creating printed circuit board layout and schematic capture tools, was a founder of Chronology Corporation, and one of the authors of the TimingDesigner timing diagram entry and analysis tool. He is the holder of three U.S. patents in the areas of timing diagrams and timing analysis of electronic circuits. He is currently engaged in the development of SystemC and behavioral synthesis tools using SystemC. Bill Murray is a technical and business consultant to EDA, semiconductor, software and systems companies. He has held research, engineering and technical marketing positions in Texas Instruments, VLSI Technology, Cadence Design Systems, the telecommunications group of the British Post Office, and the British Scientific Civil Service (Royal Radar Establishment), in the U.K., Germany and the United States. He has been involved in ESL design methodologies since 1996, when he joined the Alta Group of Cadence. He received his M.Sc. in Applied Solid State Physics from Brighton Polytechnic, U.K in 1972, and his B.Sc. (Hons) in Applied Physics from Sussex University, U.K. in 1971. Ian Oliver received his doctorate from the University of Kent at Canterbury, U.K., in 2001. He has been working with Nokia Research for the past 7 years on the use of UML and formal methods for the specification of real-time and embedded systems. Claudio Passerone received the M.S. degree in Electrical Engineering from Politecnico di Torino, Italy and the Ph.D. degree in Electrical Engineering and Communication from the same university, in 1994 and 1998, respectively. He is currently a researcher in the Electronics Department of Politecnico di Torino. His research interests include system-level design of embedded systems, electronic system simulation and synthesis, and reconfigurable computing. Dr. Passerone is a co-author of a book on hardware/software co-design of embedded systems, has published over 50 journal and conference papers, and served on technical committees of DATE and ISCAS. John Sanguinetti received his Ph.D. in Computer and Communication Sciences from the University of Michigan in 1977. Since that time he has been active in computer architecture, performance analysis, design verification, and electronic design automation. He was the founder of Chronologic Simulation in 1991 and was the principal architect of VCS, the Verilog Compiled Simulator. He was a co-founder of C2 Design Automation, now Forte Design Systems, where he continues to serve as Chief Technical Officer. He has 15 publications and 1 patent, and authored the Verilog Online Training course. Florian Schäfer received his Ph.D. in Physics from Albert Ludwigs University in Freiburg, Germany in 1995, working on GaAs microstrip detectors and readout electronics. After 1 year at the École Polytechnique in Paris, he joined the Electronics Department at the international research institute GSI, in Darmstadt, Germany. He then contributed to the first DVD chipset developed at Thomson Multi Media. Since 2001 he has been working in Cadence’s Methodology Service team with a focus on functional verification, SystemC, and ESL methodology. |
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