Brian Bailey is an independent consultant helping EDA and system design companies with technical, marketing and managerial issues related to verification and ESL. Before that he was with Mentor Graphics for 12 years, with his final position being the Chief Technologist for verification, Synopsys, Zycad, Ridge Computers, and GenRad. He graduated from Brunel University in England with a first-class honors degree in electrical and electronic engineering.

Brian is the co-editor of the book Taxonomies for the Development and Verification of Digital Systems (Springer, 2005) and the executive editor and author for The Functional Verification of Electronic Systems: An Overview from Various Points of View (IEC Press, 2005). He also authored a chapter of the book System-on-Chip Methodologies & Design Languages (Kluwer 2001). He has published many technical papers, given keynote speeches at conferences, performed seminars around the world, and been both a contributor and moderator of panels at all of the major conferences.

Brian established the functional verification track in the DesignCon conferences, which has quickly grown to be one of the major tracks of the conference. He also serves on the technical program committees of many major conferences, including the Design Automation Conference (DAC). He chairs the interfaces standards group within Accellera and has in the past chaired other standards groups in Accellera and VSIA.

Brian is primarily interested in the specification, simulation, and analysis of embedded systems and today is moving into the problems associated with, and solutions necessary for, multiprocessor systems.

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